1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and a method of forming a capacitor.
2. Description of the Background Art
FIGS. 57 to 61 are cross sectional views showing a sequence of process steps in a first conventional semiconductor device manufacturing method. First, referring to FIG. 57, an element isolation insulating film 201 is partially formed in the upper surface of a silicon substrate 200. Then, referring to FIG. 58, a polysilicon film 202 serving as a lower electrode of a capacitor is partially formed on the element isolation insulating film 201. Then, referring to FIG. 59, an insulation film 203 serving as a capacitor dielectric film is formed on the element isolation insulating film 201 to cover the polysilicon film 202. The insulation film 203 is, for example, an ON film formed by stacking silicon oxide film and silicon nitride film one above the other.
Referring next to FIG. 60, a silicon oxide film 204 is formed by thermal oxidation on an upper surface portion of the silicon substrate 200 where the element isolation insulating film 201 is not formed. After formation of a polysilicon film on the whole surface, the polysilicon film is patterned to form a gate electrode 205 and a polysilicon film 206 serving as an upper electrode of the capacitor. The polysilicon film 206 is opposed to the polysilicon film 202 with the insulation film 203 sandwiched in between. Then, referring to FIG. 61, source/drain regions 207 are formed in the upper surface of the silicon substrate 200 by ion implantation of impurities. At this time, impurities are also implanted into the gate electrode 205 and the polysilicon film 206.
FIGS. 62 to 67 are cross sectional views showing a sequence of process steps in a second conventional semiconductor device manufacturing method. First, referring to FIG. 62, a copper film 301 serving as a lower electrode of a capacitor is partially formed in the upper surface of an interlayer insulation film 300. Then, a capping film 302 of silicon nitride film is formed on the whole surface. In general, the capping film is formed to prevent copper atoms contained in a copper wire from diffusing into the interlayer insulation film. Then, referring to FIG. 63, a silicon oxide film 303 is formed on the capping film 302.
Referring next to FIG. 64, a photoresist 304 having a predetermined opening pattern is formed on the silicon oxide film 303. Using the photoresist 304 as an etch mask, the silicon oxide film 303 and the capping film 302 are etched to form a trench 305. Then, referring to FIG. 65, after removal of the photoresist 304, an insulation film 306 such as an ON film is formed on the whole surface.
Referring next to FIG. 66, by filling in the trench 305, a copper film 307 is formed on the whole surface. Then, referring to FIG. 67, the copper film 307 and the insulation film 306 are polished by CMP (Chemical Mechanical Polishing) until the upper surface of the silicon oxide film 303 is exposed. This forms an insulation film 308 serving as a capacitor dielectric film and a copper film 309 serving as an upper electrode of the capacitor in the trench 305. Through the above process steps, an MIM (Metal Insulator Metal) type capacitor is formed by a damascene process.
According to the first conventional semiconductor device manufacturing method, impurities are introduced by ion implantation into the polysilicon film 206 serving as the upper electrode of the capacitor. Thus, the impurity concentration of the polysilicon film 206 in the bottom part is lower than that in the upper part. That is, the polysilicon film 206 has a low impurity concentration in a portion where it is in contact with the insulation film 203 serving as a capacitor dielectric film. This causes depletion of the polysilicon film 206 at the interface with the insulation film 203, thereby causing a problem of capacitor performance degradation such as variations in capacitance due to changes in the applied voltage or temperature.
According to the second conventional semiconductor device manufacturing method, on the other hand, since the upper electrode of the capacitor is formed of the copper film 309, the above problem of the first manufacturing method does not arise. This method, however, requires additional independent process steps for capacitor formation (FIGS. 63 to 67), aside from the process steps for interconnection formation, which causes a problem of increasing the total number of manufacturing process steps.
An object of the present invention is to provide a method of manufacturing a semiconductor device and a method of forming a capacitor which allow the formation of a high-performance capacitor without increasing the number of process steps.
According to an aspect of the present invention, the method of manufacturing a semiconductor device includes the following steps (a) to (g). The step (a) is to prepare a substrate. The step (b) is to partially form an element isolation insulating film in a main surface of the substrate. The step (c) is to form a first semiconductor element in a first element forming region defined by the element isolation insulating film, the first semiconductor element having first source/drain regions formed in the main surface. The step (d) is to form a first electrode of a capacitor. The step (e) is to form a silicide protection film of insulation film to cover the first electrode, but not to cover the first semiconductor element. The step (f) is to form a first silicide layer by silicidation of the first source/drain regions. The step (g) is to form a second electrode of the capacitor which is opposed to the first electrode with the silicide protection film sandwiched in between.
The silicide protection film serves as a capacitor dielectric film. Thus, the number of process steps can be reduced when compared with that in the case where a capacitor dielectric film is formed aside from a silicide protection film.
According to another aspect of the present invention, the method of manufacturing a semiconductor device includes the following steps (a) to (f). The step (a) is to prepare a substrate. The step (b) is to partially form an element isolation insulating film in a main surface of the substrate. The step (c) is to form a semiconductor element in a first element forming region defined by the element isolation insulating film, the semiconductor element having source/drain regions formed in the main surface. The step (d) is to form a first electrode of a capacitor. The step (e) is to form an etching stopper film of insulation film to cover the semiconductor element and the first electrode. The step (f) is to form a second electrode of the capacitor which is opposed to the first electrode with the etching stopper film sandwiched in between.
The etching stopper film serves as a capacitor dielectric film. Thus, the number of process steps can be reduced when compared with that in the case where a capacitor dielectric film is formed aside from an etching stopper film.
According to still another aspect of the present invention, the method of manufacturing a semiconductor device includes the following steps (a) to (c). The step (a) is to form a first metal film serving as a first interconnection and a second metal film serving as a first electrode of a capacitor, within a first interconnection layer. The step (b) is to form a capping film to cover the first and second metal films. The step (c) is to form a third metal film serving as a second electrode of the capacitor within a second interconnection layer formed on the first interconnection layer, the third metal film being opposed to the second metal film with the capping film sandwiched in between.
The capping film serves as a capacitor dielectric film. Thus, the number of process steps can be reduced when compared with that in the case where a capacitor dielectric film is formed aside from a capping film.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.